IBIS Macromodel Task Group

Meeting date: 21 February 2023

Members (asterisk for those attending):
Achronix Semiconductor:       Hansel Dsilva
Amazon:                       John Yan
ANSYS:                      * Curtis Clark
                            * Wei-hsing Huang
Aurora Systems:             * Dian Yang
Cadence Design Systems:       Ambrish Varma
                            * Jared James
Google:                       Hanfeng Wang
                              GaWon Kim
Intel:                        Michael Mirmak
                            * Kinger Cai
                              Chi-te Chen
                              Alaeddin Aydiner
Keysight Technologies:        Fangyi Rao
                              Majid Ahadi Dolatsara
                              Ming Yan
                              Radek Biernacki
                              Rui Yang
Luminous Computing            David Banas
Marvell                       Steve Parker
Mathworks (SiSoft):         * Walter Katz
                              Mike LaBonte
Micron Technology:          * Randy Wolff
                            * Justin Butterfield
Missouri S&T                  Chulsoon Hwang
                              Yifan Ding
Rivos                         Yansheng Wang
SAE ITC                       Michael McNair
Siemens EDA (Mentor):       * Arpad Muranyi
Teraspeed Labs:               Bob Ross
Waymo:                        Zhiping Yang
Zuken USA:                  * Lance Wang

The meeting was led by Arpad Muranyi.  Curtis Clark took the minutes.

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Opens:

- None.

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Review of ARs:
  
- Kinger to send out draft9 of the SPIM BIRD containing changes reviewed and
  discussed in the previous meeting.
  - Done.

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Call for patent disclosure:

- None.

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Review of Meeting Minutes:

Arpad asked for any comments or corrections to the minutes of the February 14th
meeting.  Kinger moved to approve the minutes.  Jared seconded the motion.
There were no objections.

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New Discussion:

Standard Power Integrity Model (SPIM) BIRD draft:
Kinger reported that he had received no new feedback since sending out draft9.
Kinger reviewed the changes in draft9, which were enumerated in the email sent
out with it.  Arpad and Kinger asked everyone to read the draft and provide
feedback.

PSIJ Sensitivity BIRD draft:
Kinger had sent out draft6 the previous week.  Arpad had replied with a draft6_AM
containing additional minor editorial fixes, and Kinger used that as the
starting point for the review and discussion.

Kinger noted that the Solution Requirements section had been converted to table
form, as was done for the SPIM BIRD draft.  Arpad suggested that the [PSIJ
Voltage List] keyword should also be mentioned in the table.  Kinger agreed.

Kinger had added a definition of the acronym PPA (performance power area), per
Arpad's suggestion.

In the [PSIJ Sensitivity Group] Usage Rules, Arpad asked what was meant by
saying that the interface was designed in a "multiplexer architecture."  Kinger
said it was referring to cases in which the same Silicon could be used for
different standards.  For example, DDR4 and LPDDR4 might be supported by the
same controller.  Jared agreed with Arpad that "multiplexer" sounded more like a
circuit type.  Jared suggested "multi-standard" instead.  Randy suggested that
this sounded like an FPGA for which the I/O could support multiple standards.
Dian suggested, "I/O can be configured to support multiple standards."  The
group converged on:
  "I/O is configurable for supporting multiple interface standards."
  
Also in the [PSIJ Sensitivity Group] Usage Rules, Arpad noted the text stating
that the [PSIJ Sensitivity Group] / [End PSIJ Sensitivity Group] pair could
appear "multiple times in one .ibs file".  Arpad asked whether this keyword pair
is scoped under [Component].  Kinger said he wasn't sure, and he asked for an
example to illustrate the [Component] keyword.  Randy said a [Component] is a
packaged device.  He gave a DRAM example.  He said you might have a x8 DRAM and
its BGA package in one [Component].  Another [Component] in the same .ibs file
might be a x16 DRAM and its package.  Randy said the x8 and x16 [Component]s
might share some [Model]s and might have some [Model]s that were unique to each.
Kinger then confirmed that the [PSIJ Sensitivity Group] pairs should be scoped
by [Component].  He said the PSIJ sensitivity and the rails themselves might be
different for the x8 and x16 [Component]s.  Kinger said you could have multiple
[PSIJ Sensitivity Group] pairs under the same [Component] if, for example, the
[Component] supported DDR4 and LPDDR4.  Randy said the language had to be
refined to state that the keyword pair could appear multiple times, but the
name of each group had to be unique within each [Component].  Randy and Arpad
suggested this BIRD follow the example set by the [Interconnect Model Group]
keywords.
  
Randy said the Example for [PSIJ Sensitivity Group] didn't make sense.  He asked
if it was missing the [End PSIJ Sensitivity Group] keywords.  Kinger agreed and
said the Example had duplicate start keywords instead of the end keywords (cut &
paste type error).  Kinger fixed the example.

Randy asked a more general question about the simulation flow.  He asked how the
EDA tool was expected to use the [PSIJ Sensitivity Group] information in any
particular simulation.  Kinger said the intent of the proposal was a novel
methodology to account for the effect of the total noise on each of the power
rails and its contribution to jitter.  For example, for a given power rail the
simulator would perform a PI simulation to get the noise on that rail.  This
could be converted to frequency domain via FFT, then multiplied by the
[PSIJ Sensitivity] data for that rail to get a Jitter spectrum, then converted
to a time domain peak-peak Jitter via IFFT.  This would provide the
deterministic jitter contribution from that particular power rail.

Arpad asked if the intent was then to have the simulator apply the peak-peak
jitter contributions to the edges of the stimulus waveform for an IBIS or
IBIS-AMI model in an SI simulation.  Kinger said the deterministic jitter would
be applied as a post processing step to the final eye diagram.  Randy said that
what Kinger described was essentially calculation of the value to be used in the
existing IBIS-AMI Reserved Parameter Tx_Dj.  Kinger said that instead of merely
giving the platform designer an overall noise budget, as is commonly the case
today, this proposal gives noise sensitivity information to the designer and
allows them more freedom in design.

- Curtis: Motion to adjourn.
- Randy: Second.
- Arpad: Thank you all for joining.

AR: Kinger to send out draft7 of the PSIJ Sensitivity BIRD containing changes
    reviewed and discussed in today's meeting.
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Next meeting: 28 February 2023 12:00pm PT
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IBIS Interconnect SPICE Wish List:

1) Simulator directives
